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Float gate inputs may pickup any value. So

1.Both the transistors may form the conduction path and short circuit VDD&VSS. Power dissipation increases.

2.ESD signals directly enter the gate and destroy the gate oxide.

3.Inputs may pick up the unnecessary signals from the by side nets and destroy the functionality of the down the stage circuits.

4.To avoid these problems we connect the spare gate inputs either to 1/0.

Floating output's

Connected to the drain & source and is not a problem to the device structure.

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Sanity checks before floorplan in Physical Design

Sanity checks before floorplan in Physical design Sanity checks are an important step for physical design engineers to make sure that the inputs received for physical design are correct and consistent. Any issues in the input may cause problems in the later stages. So it is important to perform the sanity checks in the initial stage that is when the design is loaded in PnR tool and before the start of the floorplan. Here is a list of checks which must be performed before floorplan of design. Figure-1: Sanity checks before floorplan Library Check: In library check, basically, we validate the libraries before starting the physical design by checking the consistency between the physical and logical library. It also checks the quality of both libraries and reports the error if any. The cells used in the design must be present in the logical as well as in the physical library. Innovus commands: check_design -physicalLibrary : This command will check the physical library and report that al

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